1. Field of the Invention
The present invention relates to a memory, and more particularly, it relates to a memory comprising a refresh portion for rewriting data in memory cells.
2. Description of the Background Art
In relation to a ferroelectric memory, a disturbance is generally known as such a phenomenon that data disappear due to reduction in the quantities of polarization of ferroelectric capacitors resulting from application of a prescribed voltage to memory cells connected to word lines other than a selected word line in a rewrite operation after a read operation and a write operation on the memory cells including the ferroelectric capacitors. A conventional ferroelectric memory comprising a refresh portion exercising control for rewriting data in (refreshing) memory cells including ferroelectric capacitors in order to suppress such a disturbance is known in general. When access frequencies with respect to all memory cells reach a prescribed number of times, this conventional ferroelectric memory forcibly sequentially refreshes all memory cells with the refresh portion, thereby suppressing disturbances resulting from reduction in the quantities of polarization of the ferroelectric capacitors.
In the aforementioned conventional ferroelectric memory sequentially refreshing all memory cells, however, already refreshed memory cells are disadvantageously disturbed due to refresh operations on the remaining memory cells before the refresh portion completely refreshes all memory cells. Thus, the frequency of disturbances caused in the refreshed memory cells is disadvantageously increased.
In this regard, Japanese Patent Laying-Open No. 2003-7051, for example, proposes a ferroelectric memory for overcoming the disadvantage of the aforementioned conventional ferroelectric memory.
In the ferroelectric memory proposed in the aforementioned Japanese Patent Laying-Open No. 2003-7051, a memory cell array is divided into a plurality of memory cell arrays (memory cell blocks) each including a plurality of memory cells so that the ferroelectric memory refreshes a memory cell block exhibiting an access frequency reaching a prescribed number of times requiring a refresh operation. Thus, the ferroelectric memory disclosed in the aforementioned Japanese Patent Laying-Open No. 2003-7051 restrictively refreshes the memory cell block exhibiting the access frequency reaching the prescribed number of times, whereby the frequency of disturbances caused in refreshed memory cells can be reduced.
However, the ferroelectric memory proposed in the aforementioned Japanese Patent Laying-Open No. 2003-7051 disadvantageously preferentially refreshes the plurality of memory cell blocks along the sequence of access frequencies reaching the prescribed number of times requiring a refresh operation. When a memory cell block exhibiting an access frequency fourthly reaching the prescribed number of times requiring a refresh operation is concentrically accessed while the refresh portion refreshes a memory cell block exhibiting an access frequency firstly reaching the prescribed number of times requiring a refresh operation, therefore, the ferroelectric memory proposed in the Japanese Patent Laying-Open No. 2003-7051 fourthly refreshes the memory cell block exhibiting the access frequency fourthly reaching the prescribed number of times requiring a refresh operation, and hence the access frequency with respect to the memory cell block exhibiting the access frequency fourthly reaching the prescribed number of times requiring a refresh operation disadvantageously remarkably exceeds the prescribed number of times requiring a refresh operation. Consequently, the number of disturbances accumulated in the memory cells included in the memory cell block exhibiting the access frequency fourthly reaching the prescribed number of times requiring a refresh operation is increased, to disadvantageously cause disappearance of data resulting from the accumulated disturbances.